The present disclosure relates to technology for non-volatile storage.
Semiconductor memory is used in various electronic devices. For example, non-volatile semiconductor memory is used in cellular telephones, digital cameras, personal digital assistants, mobile computing devices, non-mobile computing devices and other devices. Electrical Erasable Programmable Read Only Memory (EEPROM) and flash memory are among the most popular non-volatile semiconductor memories.
Typically, the memory device has a memory controller and one or more memory packages. The memory package has one or more logical units. As one example, each logical unit can be a separate memory die. Each memory die contains non-volatile storage elements (e.g., non-volatile memory cells), as well as read and write circuitry. The memory package also contains addressing circuitry in order to properly address the memory cells. As one example, the memory package includes NAND flash memory. However, memory packages other than NAND flash are known.
The memory controller controls operation of the various memory packages. For example, the memory controller sends read, write (or program), erase, and other commands to the memory package. For some memory devices, the memory cells are organized as blocks. The commands identify which block of memory cells are to be accessed, in one possible scheme. Note that for some commands the address in the command further specifies which memory cells (e.g., page) within the block are to be accessed.
The memory device receives commands from a host to program units of data into memory cells in the memory device. The addressing scheme used by the host and the memory device are typically different. The address used by the host is typically referred to as a logical address. The memory device can incorporate a translation layer (e.g., a flash translation layer) that maps between the logical address (LA) used by the host and a physical address (PA) on the memory device at which the data is stored.
In order to improve read and program performance, multiple charge storage elements or memory transistors in an array are read or programmed in parallel. Thus, a “page” of memory elements are read or programmed together. In existing memory architectures, a row, or word line typically contains several interleaved pages or it may constitute one page. All memory elements of a page are read or programmed together.
The data may be stored in memory cells at one bit per memory cell, or as multiple bits per memory cell. One technique for storing a single bit per memory cell is to store one bit of a page of data into each memory cell in a group of memory cells. If two bits are to be stored per memory cell, then one bit of a first page and one bit of a second page may be stored into the group of memory cells. If three bits are to be stored per memory cell, then one bit of a first page, one bit of a second page, and one bit of a third page may be stored into the group of memory cells.